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High-Level Technology Mapping for Memories

In: Computing and Informatics, vol. 22, no. 5
Haifeng Zhou - Zhenghui Lin - Wei Cao

Details:

Year, pages: 2003, 427 - 438
Keywords:
Circuit CAD, digirtal circuit design, high-level synthesis, technology mapping
About article:
In this paper, we consider memory-mapping problems in High-Level Synthesis. We focus on the port mapping, bit-width mapping and word mapping, respectively. A 0-1 Integer Linear Programming (ILP) technique is used to solve the mapping problems, which synthesizes the source memory using one or more memory modules from a target memory library at a higher level. This method can not only perform bit-width mapping and word mapping, but it can also perform port mapping at the same time. Experimental results indicate that ILP approach is an effective method for memory reuse in high-level synthesis.
How to cite:
ISO 690:
Zhou, H., Lin, Z., Cao, W. 2003. High-Level Technology Mapping for Memories. In Computing and Informatics, vol. 22, no.5, pp. 427-438. 1335-9150.

APA:
Zhou, H., Lin, Z., Cao, W. (2003). High-Level Technology Mapping for Memories. Computing and Informatics, 22(5), 427-438. 1335-9150.