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In: Computing and Informatics, vol. 29, no. 6


Deductive Fault Simulation Technique for Asynchronous Circuits

R. Dobai - E. Gramatová

ISSN 1335-9150 (print)

Rok, strany: 2010, 1025-1043

Publikované: 0000-00-00

Abstrakt:

Fault simulator for acpASC needs to deal with hazards, oscillations and races. The simplest algorithm for simulating faults is the serial fault simulation technique which was successfully used for the acpASC. Faster fault simulation techniques, for example deductive fault simulation, was previously used for the combinational and synchronous sequential circuits only. In this paper a deductive fault simulator for the stuck-at faults of acSI acpASC is presented. An algorithm for the propagation of the fault lists is proposed which can deal with the complex gates of the acpASC. The implemented deductive fault simulator was tested using acSI benchmark circuits. The experimental results show significant reduction of the computation time and negligible increase of

Ako citovať:

ISO 690:
Dobai, R., Gramatová, E. 2010. Deductive Fault Simulation Technique for Asynchronous Circuits. In Computing and Informatics, vol. 29, no.6, pp. 1025-1043.

APA:
Dobai, R., Gramatová, E. (2010). Deductive Fault Simulation Technique for Asynchronous Circuits. Computing and Informatics, 29(6), 1025-1043.

Kľúčové slová: Asynchronous circuits, testing, serial fault simulation, complex gates, deductive fault simulation, stuck-at faults